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Answer by K.Mulier for Switching context inside an ISR on Cortex-M

It is indeed quite complicated. I am writing a book about the FreeRTOS operating system running on Cortex-M cores. I have written a chapter about this. From reading your question I believe this chapter...

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Answer by Freddie Chopin for Switching context inside an ISR on Cortex-M

Here is a code fragment that does exactly what you need - https://github.com/DISTORTEC/distortos/blob/master/source/architecture/ARM/ARMv7-M/ARMv7-M-PendSV_Handler.cpp - it works as you described:...

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Answer by Shrikant Giridhar for Switching context inside an ISR on Cortex-M

Reading a bit more and some help on the #ARM IRC channel later I was able to understand the exception return mechanism. Here is what I understand. As mentioned in the CM3 TRM, the core pushes the...

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Switching context inside an ISR on Cortex-M

I'm trying to write a barebones round-robin scheduler for the Cortex-M using the CodeSourcery GCC toolchain. My scheduler uses the SysTick to fire an interrupt after the expiry of a time slice and the...

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